Finite State Automata to Control Twins

Exercise: given a serial line, recognize when an even number of 0 or 1 bits have passed.
The automaton has an initial state coinciding with the final state and returns accepted if an even number of bits have passed from the states.

Note that the test of the automaton made with multiple run is a mode of operation required in the next exercises.
Next exercise done with jflap (download jflap from this site or from the site www.jflap.org )

Here you can download a tested version of jflap but for documentation refer to the site jflap.org